SYNthesis using Advanced Process Technology Integrated in regular Cells IPs ar...
SYNthesis using Advanced Process Technology Integrated in regular Cells IPs architectures and design platforms
This proposal addresses Objective ICT-2009.3.2: "Design of Semiconductor Components and Electronic Based Miniaturized Systems" by development of "methods and tools to cope with the design challenges in the next generations of tech...
ver más
¿Tienes un proyecto y buscas un partner? Gracias a nuestro motor inteligente podemos recomendarte los mejores socios y ponerte en contacto con ellos. Te lo explicamos en este video
Proyectos interesantes
MODERN
MOdeling and DEsign of Reliable, process variation-aware Nan...
27M€
Cerrado
MODERN
MOdeling and DEsign of Reliable process variation aware Nan...
27M€
Cerrado
REALITY
Reliable and Variability tolerant System on a chip Design in...
4M€
Cerrado
PLACES2BE
Pilot Lines for Advanced CMOS EmbodimentS in 2x nodes, Built...
359M€
Cerrado
BES-2011-047449
VARIABILIDAD Y FIABILIDAD EN DISPOSITIVOS ELECTRONICOS AVANZ...
43K€
Cerrado
TEC2008-06069
MODELADO Y SIMULACION MULTI-ESCALA DE PROCESOS DE FABRICACIO...
86K€
Cerrado
Información proyecto Synaptic
Líder del proyecto
STMICROELECTRONICS SRL
No se ha especificado una descripción o un objeto social para esta compañía.
TRL
4-5
Presupuesto del proyecto
5M€
Fecha límite de participación
Sin fecha límite de participación.
Descripción del proyecto
This proposal addresses Objective ICT-2009.3.2: "Design of Semiconductor Components and Electronic Based Miniaturized Systems" by development of "methods and tools to cope with the design challenges in the next generations of technologies" and focuses on the objective "design for manufacturability taking into account increased variability of new processes". The project described in this proposal targets the optimization of manufacturability and the reduction of systematic variations in nanometer technologies through exploitation of regularity at the architectural, structural, and geometrical levels. We propose the creation of a methodology and associated suite of design tools which extract regularity at the architectural and structural level and automate the creation of regular compound cells which implement the functionality of the extracted templates. The cell creation will employ Restricted Design Rules (RDR's) and other regularity techniques at the geometrical level to maximize manufacturability and reduce systematic variations. Since the majority of designs in the nanometer regime employ some form of SRAM the project will include a study of the effects of RDR's on SRAM in terms of performance and manufacturability and the subsequent definition of a set of RDR's which allow manufacturability optimization for logic functions while remaining compatible with SRAM technologies. To this end we have assembled a consortium of European academic, research and industrial experts with world class experience in regularity approaches at the various levels. In order to ensure the successful commercialization and deployment of the resulting tool suite the consortium includes a European EDA vendor with significant expertise in the field of design optimization through automated cell creation. This project will enable European industry to play a leading role in the definition of next generation design methodologies and challenge the US domination in the area of design automation.