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ELITE

Financiado

Cerrado

Extended Large 3D Integration TEchnology

For developing complex next-generation chips which include a combination of disparate technologies, the circuit integration exclusively in two dimensions has proved to be a seriously limiting factor. Utilising the third dimension... ver más

31/08/2011

CEA

6M€

Presupuesto del proyecto: 6M€

Líder del proyecto

COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENER... No se ha especificado una descripción o un objeto social para esta compañía.

TRL 4-5

Fecha límite participación Sin fecha límite de participación.

Ver 4 Participantes

Financiación concedida El organismo FP7 notifico la concesión del proyecto el día 2011-08-31 No tenemos la información de la convocatoria

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Información adicional privada

No hay información privada compartida para este proyecto. Habla con el coordinador.

4 Participantes

CEA

0.00€ | Lider

Lancaster University

N.D. | Participante

KTH

N.D. | Participante

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Líder del proyecto

COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENER... No se ha especificado una descripción o un objeto social para esta compañía.

TRL 4-5

Presupuesto del proyecto 6M€

Fecha límite de participación Sin fecha límite de participación.

Descripción del proyecto For developing complex next-generation chips which include a combination of disparate technologies, the circuit integration exclusively in two dimensions has proved to be a seriously limiting factor. Utilising the third dimension for integration of complex chips is a promising technique for removing the bottlenecks in two-dimensional (2-D) integration. Advantages of third-dimension (3-D) integration are in first order form factor and power dissipation.The proposed project ELITE aims at miniaturization and density increase beyond Moore by means of exhaustive die stacking. It takes as development vehicle an advanced solid state drive which will widely substitute traditional hard disk drives for purpose of mobile and hand-held applications and which is considered as the enabler of the up-coming era of mobile data. The system architecture will include a large amount of non-volatile flash memory, one or more microcontrollers and external analog high-speed interface.One of the main topics of ELITE will be the development of a technology for vertical die stacking and for vertical interconnect. Starting from the expertise and experience of the consortium new technology modifications or alternative technologies will be investigated. Also assembly technology will be investigated considering possible later usage in mass-production with its specific requirements on manufacturability and cost.Conceptual and physical simulations will be deployed for planning and ensuring the system architecture and specifying a demonstrator which will prove the feasibility of the concept. Firmware inside the chip will be used to optimize performance by means of parallel tasks, guaranty highly reliable data access as well as controlling power dissipation.As a final step, generalization of the results which are reached with the solid-state drive vehicle will be generalized in order to be re-used for applications from different technical domains and markets.

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