HORIZON-JU-Chips-2024-1-IA-T2: Topic 2 Focus topic on “High Performance RISC-V Automotive Processors supporting SDV”
The text outlines a focus on the development of an efficient Hardware Abstraction Layer (HAL) in the System Design Verification (SDV) paradigm for automotive systems, focusing on the decoupling of hardware from software development. Proposals should address various hardware design aspects, particularly targeting the implementation of a reference HAL based on RISC-V for automotive processors.
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Presentación
Minimum 3 independent legal entities based in 3 different Member States or Associated States, of which at least 1 is from a Member State. EU member states (Austria, Belgium, Bulgaria, Croatia, Cyprus, Czechia, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Netherlands, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden), Associated third countries (Albania, Armenia, Bosnia and Herzegovina, Faroe Islands, Georgia, Iceland, Israel, Kosovo, Moldova, Montenegro, New Zealand, North Macedonia, Norway, Serbia, Tunisia, Türkiye, Ukraine, United Kingdom), Other third countries. A partner from an EU or associated country must coordinate the project. Partners from other third countries cannot act as coordinators.
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Objetivo
The call aims to address the evolving software and hardware requirements in the automotive industry by developing a Hardware Abstraction Layer (HAL) based on RISC-V and other key hardware design aspects. Projects will focus on enabling efficient collaboration, creating open high-performance RISC-V processors, enhancing safety and security, exploring interconnect solutions, and more. The call seeks to fund initiatives that advance hardware design and facilitate software development, with a focus on automotive processors and associated technologies. It encourages collaboration among European stakeholders to develop innovative solutions for specific automotive needs, emphasizing interoperability, security, real-time operation, and compliance with industry standards. The funded projects will contribute to the development of a reference HAL, leveraging RISC-V technology and promoting flexible hardware solutions. Additionally, efforts will be made to address incremental hardware development... ver más
The call aims to address the evolving software and hardware requirements in the automotive industry by developing a Hardware Abstraction Layer (HAL) based on RISC-V and other key hardware design aspects. Projects will focus on enabling efficient collaboration, creating open high-performance RISC-V processors, enhancing safety and security, exploring interconnect solutions, and more. The call seeks to fund initiatives that advance hardware design and facilitate software development, with a focus on automotive processors and associated technologies. It encourages collaboration among European stakeholders to develop innovative solutions for specific automotive needs, emphasizing interoperability, security, real-time operation, and compliance with industry standards. The funded projects will contribute to the development of a reference HAL, leveraging RISC-V technology and promoting flexible hardware solutions. Additionally, efforts will be made to address incremental hardware development challenges, promote collaboration across different projects, and align with previous and ongoing initiatives in the automotive sector to ensure continuity and compatibility. ver menos
Temáticas
- Temática principal: , Hardware Abstraction Layer, HAL, System Design Verification, SDV... ver más.
Características del líder del consorcio
Ambito
Categorias
Características del Proyecto
Requisitos
Requisitos
Capítulos
Tecnología
Características de la financiación
%
Intensidad de la ayuda: Sólo fondo perdido + info
700.0K - 20.0M €
Min - Max. Fondo perdido
The funding rate for IA projects is 70 % for profit-making legal entities and 100 % for non-profit legal entities.
Condiciones
Información adicional de la convocatoria
E. Incentiv.
Respuesta
Competitiva
Minimis
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