Memory management technology for adaptive and efficient design of embedded syste...
Memory management technology for adaptive and efficient design of embedded systems
The theme of intelligent ubiquitous devices will dominate future embedded system designs and speed up the integration of multimedia and communication applications, thus creating very complex, dynamic source code. Today it is incre...
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Descripción del proyecto
The theme of intelligent ubiquitous devices will dominate future embedded system designs and speed up the integration of multimedia and communication applications, thus creating very complex, dynamic source code. Today it is increasingly impossible for designers to map applications cost-efficiently to any platform without significant optimization of the initial source code. The MNEMEE project will address this key challenge by introducing an innovative supplementary source-to-source optimization design layer for data management between the state-of-the-art optimizations at the application functionality and the compiler design layer. Novel features include: i) multi-objective explorations that allow trade-offs which designers highly need to rightly position their product in the huge search space, ii) a combination of design-time and run-time techniques to boost the cost-efficiency and performance, and iii) automated optimizations that are applied once to reduce design effort and can handle very complex code. No existing integrated framework allows this and ongoing projects do not address it sufficiently. The key focus of the project is the efficient data access and memory storage of both dynamically and statically allocated data and their assignment on the memory hierarchy. The few existing source-to-source approaches only deal with the static manifest arrays and simple code. In contrast, MNEMEE will deliver all the necessary design methodologies, heuristics and prototype tools to enable the fast exploration of the huge dynamic and static design space. These optimizations and automation support will result in reduced exploration design time by at least a factor of 2, decreased memory footprint and memory bandwidth requirements of 30%, and improved energy and power efficiency by a factor of 2. The project will enable customized solutions for programmable Multi-Processor platforms involving the necessary system trade-offs, while meeting all real-time specifications.