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MOSART

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Cerrado

Mapping Optimisation for Scalable multi core ARchiTecture

The mission of MOSART project is to define and develop an efficient SW/HW design environment encompassing a flexible, modular, multi-core, on-chip platform, and associated exploration methods and tools, to allow the scaling and op... ver más

31/12/2010

THALES SIX GTS Fra...

4M€

Presupuesto del proyecto: 4M€

Líder del proyecto

THALES SIX GTS FRANCE SAS No se ha especificado una descripción o un objeto social para esta compañía.

TRL 4-5

Fecha límite participación Sin fecha límite de participación.

Ver 8 Participantes

Financiación concedida El organismo FP7 notifico la concesión del proyecto el día 2010-12-31 No tenemos la información de la convocatoria

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Información adicional privada

No hay información privada compartida para este proyecto. Habla con el coordinador.

8 Participantes

THALES SIX GTS France

0.00€ | Lider

VTT

N.D. | Participante

DEMOCRITUS UNIVERSITY OF THR...

N.D. | Participante

RESEARCH UNIVERSITY INSTITUT...

N.D. | Participante

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Líder del proyecto

THALES SIX GTS FRANCE SAS No se ha especificado una descripción o un objeto social para esta compañía.

TRL 4-5

Presupuesto del proyecto 4M€

Fecha límite de participación Sin fecha límite de participación.

Descripción del proyecto The mission of MOSART project is to define and develop an efficient SW/HW design environment encompassing a flexible, modular, multi-core, on-chip platform, and associated exploration methods and tools, to allow the scaling and optimisation of various applications in multimedia and wireless communication. The project will address two main challenges of prevailing architectures: 1) The global interconnect and memory bottleneck due to a single, globally shared memory with high access times and power consumption; 2) The difficulties in programming heterogeneous, multi-core platforms, in particular in dynamically managing data structures in distributed memory. MOSART aims to overcome these through a multi-core architecture with distributed memory organisation, a Network-on-Chip (NoC) communication backbone and configurable processing cores that are scaled, optimised and customised together to achieve diverse energy, performance, cost and size requirements of different classes of applications. MOSART achieves this by: A) Providing platform support for management of abstract data structures including middleware services and a run-time data manager for NoC based communication infrastructure; B) Developing tool support for parallelizing and mapping applications on the multi-core target platform and customizing the processing cores for the application. The aim is to maintain Europe as a worldwide player in the field of efficient implementation of MPSoC architectures. These ambitious goals are achievable because we bring advanced tools and platforms, i.e. a NoC platform and design space exploration tools from KTH, data management tools from DUT, middleware for NoC services from ART, parallelizing and mapping tools from IMEC, processor configuration tools from VTT. SMEs ART and COW contribute to tools, and two systems companies TCF and ICOM bring applications from future high data rate wireless access.

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