Exploration of the potential of 45nm CMOS for Analog/RF applications
CMOS scaling is the engine of the continuous improvement of digital applications. It has also been demonstrated that CMOS also offers great potential for very high speed or very low power wireless and wireline applications. This...
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Descripción del proyecto
CMOS scaling is the engine of the continuous improvement of digital applications. It has also been demonstrated that CMOS also offers great potential for very high speed or very low power wireless and wireline applications. This potential, together with the high levels of integration that are typical for CMOS technology, and the cost per square mm, allows RF CMOS to compete with SiGe(C) bipolar and BiCMOS and III-V (GaAs, InP) as the technology of choice for new communication demands in volume production. Therefore, it can become a main contributor to the ubiquitous communication society. However, at the same time, limitations start to appear, especially with respect to Vdd scaling, and loss of analog performance with the introduction of new materials. The 45nm node (and beyond) is not well established for digital CMOS, which makes it more difficult to assess the analog/RF performance on the level of basic building blocks. Therefore, the first objective of this project is an early assessment of the potentials of the 45nm Analog/RF CMOS options. This objective is essential for establishing a long-term Analog/RF technology development strategy. The second objective is to develop circuit topologies that cope with the low Vdd operation and possible degradations of analog/RF performance, very high frequencies or ultra low power consumption. The third objective is to deliver compact models for 45nm Analog/RF CMOS. There is a natural flow of information from technology, to models and to circuit design. Therefore, NANO-RF anticipates the need for several optimisation cycles, including the design of two test vehicles within the course of the project. This approach allows for feedback to technology and modelling based on initial circuit results.