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ViTFOX

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Vision transformers with ferroelectric oxides

ViTFOX project develops a ferroelectric-augmented intelligent semiconductors technology to demonstrate a Vision Transformer (ViT) with superb energy efficiency of > 50 TOPS/Watt and make an impact on AI-powered edge applications.... see more

30/09/2027

unknown leader

1M€

Project Budget: 1M€

Project leader unknown leader

PARTICIPATION DEPralty Sin fecha límite de participación.

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Financing granted El organismo HORIZON EUROPE notifico la concesión del proyecto The day 2024-10-17

HORIZON-JU-Chips-2024-3-RIA: Joint call with Korea

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5 Participantes

"NATIONAL CENTER FOR SCIENTI...

SILICON AUSTRIA LABS GMBH

EIDGENOESSISCHE TECHNISCHE H...

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Project duration: 35 months Date Start: 2024-10-17
End date: 2027-09-30

Project leader unknown leader

Project Budget 1M€

participation deadline Sin fecha límite de participación.

Project description ViTFOX project develops a ferroelectric-augmented intelligent semiconductors technology to demonstrate a Vision Transformer (ViT) with superb energy efficiency of > 50 TOPS/Watt and make an impact on AI-powered edge applications. The project aims to strengthen the leading position of EU and Korea in Hafnia-based Si-compatible ferroelectric electronics pioneered in Europe (Germany) and significantly advanced by Korean researchers, members of this project. ViTFOX proposes advancements beyond the state of the art, at a TRL 4-5, in the whole value chain from materials and devices to heterogeneous and monolithic integration as well as design and simulation of the ViT circuits and systems. Three of the project objectives target the design and fabrication of the main components of the ViT, namely a Compute-in Memory demonstrator, a circuit level simulator and a hardware-software co-optimization platform with ferroelectric oxides. The platform will support two types of emerging memories, high-density 3D FeRAM developed in Korea and epitaxial Ferroelectric Tunnel Junctions developed in EU. Another set of objectives target the low voltage/low power operation of ferroelectric devices using epitaxial growth, new metal electrodes and advanced processing techniques such as atomic layer etching as well as the integration of these devices to fabricate memory arrays used in the ViT. The consortium consists of five Universities, two research organizations and one large European technology development laboratory, mobilizing all necessary expertise and infrastructure in ferroelectric and semiconductor technologies. The consortium plans to valorize the technology in two of the newly established Chips JU pilot lines on advanced integration during the project and advance it to higher TRL (> 5) after the project end to ensure manufacturability for future volume production.

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