Sub nanometer quantum engineering of 2D materials for optoelectronic devices
Optoelectronic devices are at the core of today’s information revolution, bridging digital electronics and optical fiber telecommunications. However, there is a worrisome disparity in the scaling of global internet traffic (growin...
Optoelectronic devices are at the core of today’s information revolution, bridging digital electronics and optical fiber telecommunications. However, there is a worrisome disparity in the scaling of global internet traffic (growing at 60% rate every year) and the capacity of the optical network (with growth rate of just 20%). Therefore, there is a need for new miniaturized optoelectronic technologies, and integration on silicon is a must. The objective of this project is to address this issue with a new technology for ultrafast optoelectronic components based on low-dimensional materials to achieve increased data rate and reduced footprint and power consumption. It will explore a radically new way to engineer the electrical and optical properties of these materials (specifically 2D materials and van der Waals heterostructures), to achieve, for instance, optical modulators with tunable operation wavelength and unprecedented modulation speeds and footprints. One key innovation of this approach is the use of a new gate oxide nanolamination technique able to apply a periodical electrostatic field (with sharp variations below 1 nm) on any 2D material to modify and dynamically tune their band structures. These superlattices are expected to show tunable optical properties, quantum confinement and intersubband transitions, which will pave the way to new optoelectronic components such as modulators, photodetectors, tunable lasers and light emitting diodes. This approach can be used to achieve improved coupling with polaritons in 2D materials as well, which will enhance light-matter interactions reducing the footprint of the devices. The fabrication is compatible with multiple substrate materials, including silicon and III-V semiconductors. The project will focus on large area devices operating at room temperature and integrated on silicon, to ease the subsequent implementation of this groundbreaking technology into large scale production.ver más
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