OPTIMA
Financiado
Optimizing Industrial Applications for Heterogeneous HPC systems
In order to support the expanding demands for processing power from emerging HPC applications, within a pragmatic energy envelope, the future HPC systems will incorporate accelerators. One promising approach, towards this end, is...
In order to support the expanding demands for processing power from emerging HPC applications, within a pragmatic energy envelope, the future HPC systems will incorporate accelerators. One promising approach, towards this end, is the utilization of FPGAs; the main advantage of those devices is that, since they can be reconfigured at any time so as to implement tailor-made application accelerators, their energy efficiency and/or performance, in most of the cases, is much higher than that of CPUs and GPUs.
OPTIMA is an SME-driven project aiming to port and optimize a number of industrial applications as well as a set of open-source libraries, utilized in at least 3 different application domains, to two novel FPGA-populated HPC systems, utilizing several innovative programming environments. It is expected that the applications and the libraries will be executed, in those heterogeneous HPC systems at significantly higher energy-efficiency as described by the Energy Delay Product metric (EDP); in particular, the EDP of the OPTIMA applications and libraries when executed on the targeted FPGA-based HPC systems, is expected to be more than 10x higher than that triggered by CPU-based systems and more than 3x higher than the GPU-based ones.
The main outcomes of OPTIMA will be that: a) the participating SMEs will gain a significant advantage since they will be able to execute their applications much more efficiently than the competition, b) it will be further proved that Europe is at the forefront of developing efficient FPGA-populated HPC systems and application/libraries taking advantage of them, c) the open-source libraries as well as the open-source applications developed within OPTIMA will allow third parties to easily target FPGA-based HPC systems for their application developments, d) there will be an open-to-use HPC infrastructure supported by a specially formed sustainability body.
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Duración del proyecto: 35 meses
Fecha Inicio: 2020-12-21
Fecha Fin: 2023-11-30
Fecha Fin: 2023-11-30
Línea de financiación: concedida
El organismo H2020 notifico la concesión del proyecto el día 2023-11-30
Línea de financiación objetivo
El proyecto se financió a través de la siguiente ayuda:
Presupuesto
El presupuesto total del proyecto asciende a
4M€
Líder del proyecto
POLYTECHNEIO KRITIS
No se ha especificado una descripción o un objeto social para esta compañía.
Perfil tecnológico
TRL
4-5
Perfil tecnológico
TRL
4-5
204.82K€ |
Participante