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NANOPACK

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Nano Packaging Technology for Interconnect and Heat Dissipation

One of the major limitations to continued performance increases in the semiconductor and power electronics industries is integration density and thermal management. Continued transistor downscaling is quickly reaching its limits f... ver más

30/09/2011

THALES

11M€

Presupuesto del proyecto: 11M€

Líder del proyecto

THALES No se ha especificado una descripción o un objeto social para esta compañía.

TRL 4-5

Fecha límite participación Sin fecha límite de participación.

Ver 13 Participantes

Financiación concedida El organismo FP7 notifico la concesión del proyecto el día 2011-09-30 No tenemos la información de la convocatoria

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13 Participantes

THALES

0.00€ | Lider

VTT

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MENTOR GRAPHICS

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CHALMERS TEKNISKA HOGSKOLA A...

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Líder del proyecto

THALES No se ha especificado una descripción o un objeto social para esta compañía.

TRL 4-5

Presupuesto del proyecto 11M€

Fecha límite de participación Sin fecha límite de participación.

Descripción del proyecto One of the major limitations to continued performance increases in the semiconductor and power electronics industries is integration density and thermal management. Continued transistor downscaling is quickly reaching its limits forcing a new focus on heterogeneous integration and 3D packaging technologies to continue performance improvements by reducing interconnect length between memory and multi-core logic. These efforts must combine high density electrical interconnects with low resistance thermal interfaces to remove heat from the intricate layered assemblies. Power electronics applications in hybrid vehicles and power supplies are also being pushed to new integration densities that are largely limited by the ability to transfer heat across interfaces to liquid coolers and heat sinks. Improved thermal management and integration densities for these applications will also be important to improve energy and manufacturing efficiency and component reliability.The proposed project aims at developing new technologies and materials for low thermal resistance interfaces and electrical interconnects by exploring systems such as carbon nanotubes, nanoparticles and nano-structured surfaces using different enhancing contact formation mechanisms combined with high volume compatible manufacturing technologies such as electro-spinning. Recent groundbreaking work on nested channel interfaces to control particle interactions during the formation of interfaces will be utilized to exploit the beneficial properties of the new materials. In addition, state-of-the-art modelling and simulation techniques with world class supercomputers will be combined with the development of experimental test structures to measure the performance of new interface technologies and validate design tools. Finally the technology will be used in several different applications to demonstrate improved performance of high power radio frequency switches, microprocessors and hybrid vehicle power electronics.

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