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MERASA

Financiado

Cerrado

Multi core Execution of Hard real time Applications Supporting Analysability

The increasing demand for functionality in current and future real-time embedded systems is driving an increase in performance of processors. However at the same time, in developing safety-related real-time embedded systems, there... ver más

31/10/2010

UAU

3M€

Presupuesto del proyecto: 3M€

Líder del proyecto

UNIVERSITAET AUGSBURG No se ha especificado una descripción o un objeto social para esta compañía.

Fecha límite participación Sin fecha límite de participación.

Ver 6 Participantes

Financiación concedida El organismo FP7 notifico la concesión del proyecto el día 2010-10-31 No tenemos la información de la convocatoria

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Información adicional privada

No hay información privada compartida para este proyecto. Habla con el coordinador.

6 Participantes

UAU

0.00€ | Lider

UNIVERSITE TOULOUSE III - Pa...

N.D. | Participante

RAPITA

N.D. | Participante

BARCELONA SUPERCOMPUTING CEN...

N.D. | Participante

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Líder del proyecto

UNIVERSITAET AUGSBURG No se ha especificado una descripción o un objeto social para esta compañía.

Presupuesto del proyecto 3M€

Fecha límite de participación Sin fecha límite de participación.

Descripción del proyecto The increasing demand for functionality in current and future real-time embedded systems is driving an increase in performance of processors. However at the same time, in developing safety-related real-time embedded systems, there is a need to prove that the timing requirements are met. Multi-core processors are increasingly being considered as the solution to achieve the increased processor performance, without increasing CPU clock speeds and maintaining low chip costs, low power consumption etc. However, current trends in mainstream multi-core processor design result in processors with certainly reduced average execution times, but typically with unpredictable and unanalysable (or extremely pessimistic) worst case behaviour that deems them unusable in the domain of safety-related real-time embedded systems.<br/>The MERASA project will develop multi-core processor designs (from 2 to 16 cores) for hard real-time embedded systems hand in hand with timing analysis techniques and tools to guarantee the analysability and predictability regarding timing of every single feature provided by the processor. Design exploration activities will be performed in conjunction with the timing analysis tools. The project will address both static WCET analysis tools (the OTAWA toolset) as well as hybrid measurement-based tools (RapiTime) and their interoperability. It will also develop system-level software with predictable timing performance.<br/>To constrain production costs and technology integration risks, we investigate hardware-based real-time scheduling solutions that empower the same multi-core processor to handle hard, soft, and non real-time tasks on different cores. The developed hardware/software techniques will be evaluated by application studies from aerospace, automotive, and construction-machinery areas performed by selected industrial partners.

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