Innovating Works

NANOINFER

Financiado
Intelligent Memories that Perform Inference with the Physics of Nanodevices
Cognitive tasks are increasingly necessary in modern electronics. The energy efficiency of associated algorithms, which rely on abundant stored parameters, is severely limited by the separation of computation and memory elements i... Cognitive tasks are increasingly necessary in modern electronics. The energy efficiency of associated algorithms, which rely on abundant stored parameters, is severely limited by the separation of computation and memory elements in conventional computers. In NANOINFER, I will directly address this challenge by developing intelligent memory chips that natively perform both memory and computing functions, using CMOS and emerging nanodevices. These chips will perform modern Bayesian inference algorithms, which allow cognitive-type reasoning. The project includes theoretical investigations as well as intelligent memory chip designs, which will be supported by proof-of-concept experimental demonstrations. The proposed architectures, based on spintronic and memristive memories, will maximize energy efficiency by leveraging the complex physics of these emerging devices for inference operations and the storage of model parameters, and by minimizing exchanges between computation units and memory. Inference will be performed using sampling algorithms that allow tackling difficult problems and are robust to nanodevice imperfections. The inference circuits will be composed of digital CMOS logic as well as spiking neurons circuits. Two standard Bayesian approaches will be employed to enable learning, permitting highly adaptive systems. Preliminary results on a system that performs naïve Bayesian inference have validated this concept and its use with novel memory technologies. NANOINFER will resolve critical interdisciplinary challenges to permit intelligent memories to perform non-naïve tasks, ensuring a correspondence between device physics and Bayesian concepts while maintaining a fusion between computation and memory. This project will deepen our understanding of novel memory technologies and develop a toolbox for creating intelligent memory chips. These will allow smart devices to perform cognitive/sensory-motor tasks at low energy without requiring large computing machines. ver más
31/08/2023
CNRS
1M€
Duración del proyecto: 80 meses Fecha Inicio: 2016-12-12
Fecha Fin: 2023-08-31

Línea de financiación: concedida

El organismo H2020 notifico la concesión del proyecto el día 2023-08-31
Línea de financiación objetivo El proyecto se financió a través de la siguiente ayuda:
ERC-2016-STG: ERC Starting Grant
Cerrada hace 9 años
Presupuesto El presupuesto total del proyecto asciende a 1M€
Líder del proyecto
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE... No se ha especificado una descripción o un objeto social para esta compañía.
Perfil tecnológico TRL 4-5