Innovating Works

ALLME

Financiado
All Magneto-Electric Spin Logic Gates
The surge in electronic equipment used daily across the globe, from end-user devices to data centres, has led to a craving for more energy-efficient computing devices. However, the current Moore’s Law epitomised miniaturisation pr... The surge in electronic equipment used daily across the globe, from end-user devices to data centres, has led to a craving for more energy-efficient computing devices. However, the current Moore’s Law epitomised miniaturisation process of CMOS transistors will be gradually limited by increasing power densities and associated chip heating. Therefore, much research has been devoted to the development of alternative computing devices. Spintronic devices, which exploit both the charge and the spin of electrons, are seen as a promising beyond-CMOS approach due to their ultralow energy per operation, non-volatility, and capability to build more expressive logic gates. Despite much recent success in realizing spintronic logic gates such as those that employ magnetic domain walls or spin waves as information carriers, there are two major limitations that impede the inclusion of such devices in microelectronic technologies. The first is the lack of energy-efficient transducers for interconversion of signals between the magnetic and electrical domains. The second issue is the inability to propagate magnetic information carriers over large distances in the magnetic domain, i.e., the lack of magnetic interconnect. To address these challenges, we propose a novel spin logic device concept (ALLME) based on layered strain-mediated magnetoelectric composites containing both piezoelectric and magnetostrictive materials. By exploiting its magnetoelectric effect, the magnetisation in a nanomagnet can be rotated with voltages, and in the inverse effect, the change in magnetisation will result in a voltage output. ALLME aims to deliver one of the most technologically competitive spin logic concepts, with an emphasis on ultra-low energy consumption and all charge-based interconnects that are readily to be cascaded in complex logic circuits, to solve the long-standing challenges in spin logic. ver más
31/08/2026
176K€
Duración del proyecto: 38 meses Fecha Inicio: 2023-06-30
Fecha Fin: 2026-08-31

Línea de financiación: concedida

El organismo HORIZON EUROPE notifico la concesión del proyecto el día 2023-06-30
Línea de financiación objetivo El proyecto se financió a través de la siguiente ayuda:
Presupuesto El presupuesto total del proyecto asciende a 176K€
Líder del proyecto
INTERUNIVERSITAIR MICROELECTRONICA CENTRUM No se ha especificado una descripción o un objeto social para esta compañía.
Perfil tecnológico TRL 4-5